VxWorks Reference Manual : Libraries
cacheR333x0Lib - MIPS R333x0 cache management library
cacheR333x0LibInit( ) - initialize the R333x0 cache library
This library contains architecture-specific cache library functions for the MIPS R333x0 architecture. The R33300 utilizes a 4-Kbyte instruction cache and a 2-Kbyte data cache that operate in write-through mode. The R33310 utilizes a 8-Kbyte instruction cache and a 4-Kbyte data cache that operate in write-through mode. Cache line size is fixed at 16 bytes. Cache tags may be invalidated on a per-line basis by execution of a store to a specified line while the cache is in invalidate mode.
For general information about caching, see the manual entry for cacheLib.
arch/mips/lr33300.h, cacheLib.h
cacheR333x0Lib, cacheLib, LSI Logic LR33300 and LR33310 Self-Embedding Processors User's Manual
cacheR333x0LibInit( ) - initialize the R333x0 cache library
STATUS cacheR333x0LibInit ( CACHE_MODE instMode, /* instruction cache mode */ CACHE_MODE dataMode /* data cache mode */ )
This routine initializes the function pointers for the R333x0 cache library. The board support package can select this cache library by calling this routine.
OK.