Honeywell Series 60 (Level 6)
Minicomputer Systems Handbook

Introduction and Overview of the Models 23, 33, 43, 47, 53, and 57;
System and Central Processor Architecture;
Instruction Set and Addressing;
Central Processor Control Panels;
and Instruction Timings.

ORDER NUMBER: CC71, Rev 0, October 1978.

• Introductory material (7 pages, 1.13 Mb):
  • Cover
  • Preface
  • Contents
  • Photographs of pretty girls
• Section 1: System Summary (30 pages, 5.62 Mb):
  • Models
  • Board Technology
  • Packaging
  • Quality Logic Tests
  • System Elements
• Section 2: System Architecture (11 pages, 1.93 Mb):
  • System Bus
  • Connectable Units
  • Input/Output Channels
  • Interunit Communication
  • Summary of Bus Operations
  • Memory Addresses
• Section 3: Central Processor Operation (25 pages, 4.44 Mb):
  • Registers
  • Summary of Program Visible Registers
  • Interrupts
  • Traps
  • Queue Management
  • Stack Management
  • Scientific Instruction Processor
  • Commercial Instruction Processor
  • Memory Management Unit
• Section 4a: Instructions and Addressing (12 pages, 2.16 Mb):
  • Instruction Set Summary
  • Instruction Formats and Addressing
• Section 4b: Instruction Set (107 pages, 14.4 Mb):
• Section 5: Central Processor Control Panels (16 pages, 2.93 Mb):
  • Packaging
  • Full Control Panel
  • Basic Control Panel
  • Control Panel Operating Procedures
• Appendices (17 pages, 1.95 Mb):
  • Appendix A: Instruction Timings (Models 23, 33, 43/47, 53/57)
  • Appendix B: Address Syllable Reference Table
  • Appendix C: Hardware Dedicated Memory Locations